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  88W8688 integrated mac/baseband/rf wlan and bluetooth soc product brief copyright ? 2009 marvell doc. no. mv-s106650-00 rev. f n ovember 30, 2009, 2.00 p age 1 product overview the marvell ? 88W8688 is a low-cost, low-power highly-integrated ieee 802.11a/g/b mac/baseband/rf wlan and bluetooth baseband/rf system-on-chip (soc). the device is designed to support ieee 802.11a or 802.11g payload data rates of 6, 9, 12, 18, 24, 36, 48, and 54 mbps, as well as 802.11b data rates of 1, 2, 5.5, and 11 mbps for wlan operation. for bluetooth operation, the device supports bluetooth 3.0 + high speed (hs) (also compliant with bluetooth 2.1 + edr). the 88W8688 provides the combined functions of the ieee standard 802.11/802.11b direct sequence spread spectrum (dsss), 802.11a/g orthogonal frequency division multiplexing (ofdm) baseband modulation, medium access controller (mac), cpu, memory, host interfaces, direct-conversion wlan rf radio, and bluetooth on a single integrated chip. the core functional units of the 88W8688 are connected with a high throughput interconnect system, as shown in figure 1 . the 88W8688 is equipped with a fully integrated rf to baseband radio that operates in both the 2.4 ghz ism radio band for 802.11g/b wlan applications and 5 ghz unii radio band for 802.11a wlan applications. it also contains all the circuitry to support both transmit and receive for bluetooth operation. for optimum performance, the gain adjustment of the integrated lna and agc on the receive path is seamlessly controlled by baseband functions. integrated transmitters up-convert the quadrature baseband signal, and then deliver the rf signals to external power amplifiers for 2.4 ghz and 5 ghz radio band transmission. local oscillator frequencies are generated by a fully integrated programmable frequency synthesizer with no external components. the loop bandwidth is optimized for phase noise and dynamic performance and quadrature signals are generated on-chip. for security, the 88W8688 supports the ieee 802.11i security standard through implementation of the advanced encryption standard (aes)/counter mode cbc-mac protocol (ccmp), and wired equivalent privacy (wep) with temporal key integrity protocol (tkip) security mechanisms. the device also supports internet protocol security (ipsec) with des/3des/aes encryption and md5/sha-1 authentication. for video, voice, and multimedia applications, the 88W8688 supports 802.11e quality of service (qos). the device also supports 802.11h dynamic frequency selection (dfs) for detecting radar pulses when operating in the 5 ghz range. the 88W8688 supports a generic spi (g-spi) and sdio host interface for connecting the wlan to the host processor. high-speed uart, pcm/inter-ic sound (i 2 s), and sdio interfaces are available to connect the bluetooth core to the host processor. a bluetooth coexistence interface is also supported for external, co-located bluetooth devices.
88W8688 product brief doc. no. mv-s106650-00 rev. f c opyright ? 2009 marvell p age 2 november 30, 2009, 2.00 marvell reference designs are highly-integrated low cost, production quality designs that provide a quick time-to-market solution for customers developing single chip ieee 802.11a/g/b wlan and bluetooth solutions. figure 1: top block diagram 1 1. antenna can be used as an option to enhance performance. i n t e r n a l b u s direct conversion radio xtal_in/xo xtal_out host interface host interface unit dma sdio g- spi sdio osc 802 .11 a 5 ghz rx 802 .11 g/ b 2.4 ghz rx rx rx 802 .11 a 5 ghz tx 802 .11 g/b 2.4 ghz tx 2.4 ghz external pa 5 ghz external pa tx tx g-spi sram bbu dac bbu adc wlan mac/baseband 802.11a/g/b baseband (cck/ofdm) 802.11 mac rx/tx power management modulator demod dac adc bluetooth arbiter jtag interface i 2 s, pcm, and iec 60958 compatible audio codec interface aes/ccmp wep/tkip ipsec encryption antenna antenna select , t/r switch ser ial if pow er enable c ontr ol power down sleep clock bluetooth coexistence interface 88W8688 spi serial eeprom/pm 2-wire serial interface 1-wire serial interface 3-wire, 4-wire serial interface uart for bluetooth core gpio audio interface audio codec controller bluetooth radio unit bluetooth unit bluetooth feroceon cpu processor c p u b u s jtag cpu interface interrupts timers peripheral bus b u s peripheral bus unit clocked serial unit gpio/led uart
product overview applications copyright ? 2009 marvell doc. no. mv-s106650-00 rev. f nove mber 30, 2009, 2.00 p age 3 applications ? wlan/bluetooth enabled cellular handsets ? wlan/bluetooth headsets ? portable audio/video devices and accessories ? gaming platforms ? wlan/bluetooth enabled digital still cameras and printers general features ? single-chip integration of 802.11a/g/b wireless direct conversion radio, baseband, mac, cpu, memory, host interfaces, and bluetooth ? integrates all 802.11a/g/b rf to baseband transmit and receive operations, with support for external power amplifiers ? fully integrated frequency synthesizers with optimized phase noise performance for ofdm applications ? ultra low-power dissipation ? supports 12, 13, 19.2, 20, 24, 26, 38.4, 40, or 52 mhz oscillator clock source ? supports marvell bluetooth coexistence standards ieee 802.11 wlan ? 802.11 data rates of 1 and 2 mbps ? 802.11b data rates of 5.5 and 11 mbps ? 802.11a/g data rates of 6, 9, 12, 18, 24, 36, 48, and 54 mbps for multimedia content transmission ? 802.11e quality of service (qos) ? 802.11h dfs statistics processing ? 802.11h transmit power control ? 802.11j channels (japan) ? 802.11s mesh networking bluetooth ? bluetooth 3.0 + high speed (hs) (also compliant with bluetooth 2.1 + edr) ? bluetooth class 1 (up to 10 dbm without external pa) (class 1.5) ? bluetooth class 1 (greater than 10 dbm with external pa) packaging ? 6 x 10 mm 152-pin tfbga ? flip chip package (400 m) processor cpu ? integrated marvell feroceon? cpu (armv5te-compliant) ? offloads wireless protocol stack processing from host cpu ? 106 mhz operating frequency dma ? independent 2-channel direct memory access (dma) memory ? internal sram for tx frame queues and rx data buffers ? boot rom networking functions wlan mac ? ad-hoc and infrastructure modes ? request-to-send (rts)/clear-to-send (cts) for operation under distributed coordination function (dcf) ? hardware filtering of 64 multicast and 96 unicast addresses and additional firmware options ? on-chip tx and rx fifos for maximum throughput ? open system and shared key authentication services ? managed information base counters ? quality of service (qos) ? dfs statistics processing ? mesh networking ? power management ? external sleep clock control ? transmit rate adaptation ? transmit power control ? long and short preamble generation on a frame-by-frame basis for 802.11b frames
88W8688 product brief doc. no. mv-s106650-00 rev. f c opyright ? 2009 marvell p age 4 n ovember 30, 2009, 2.00 wlan baseband ? dsss and ofdm modulation ? advanced equalizer for complementary code keying (cck) modes ? differential binary phase shift keying (dbpsk), differential quadrature phase shift keying (dqpsk), and cck modulation modes ? 16-qam and 64-qam modulation ? on-chip a/d and d/a converters for inphase/quadrature (i/q) channels ? targeted for multi-path delay spreads up to 680 ns in 11 mbps mode and 150 ns in 54 mbps mode ? dfs statistics gathering ? 802.11j channels (japan) wlan rf rx path ? on-chip gain selectable lna with optimized noise figure and power consumption ? highly integrated architecture eliminates need for external saw filter ? high dynamic range agc function in receive mode ? immune to high power cellular phone transmission signals ? supports antenna diversity tx path ? supports external pa with power control for both 2.4 ghz and 5 ghz operation ? image-reject transmitter to reduce external rf filter count for 2.4 ghz radio transmit ? supports closed and open loop power control in increments of 0.5 db ? very low spectral emissions in the cellular phone receive band wlan encryption ? aes-ccmp hardware implementation as part of 802.11i security standard ? wpa (wi-fi protected access) encryption ? wep 64- and 128-bit encryption with hardware tkip processing ? ipsec security acceleration in hardware bluetooth ? digital audio interfaces including pcm interface for voice application and i 2 s for digital stereo applications ? baseband and radio basic data rate and edr packet types?1 mbps (gfsk), 2 mbps (p/4-dqpsk), and 3 mbps (8dpsk) ? fully functional bluetooth baseband?afh, forward error correction, header error control, access code correlation, crc, encryption bit stream generation, and whitening ? adaptive frequency hopping (afh), including packet loss rate (plr) ? interlaced scan for faster connection setup ? simultaneous active acl connection support ? full master and slave piconet support ? scatternet support ? standard uart and sdio type-a hci transport layer ? hci layer verified to function with major profile stack vendors ? sco/esco links with hardware accelerated audio signal processing and hardware supported ppec algorithm for speech quality improvement ? all standard sco/esco voice coding ? all standard pairing, authentication, link key, and encryption operations ? standard bluetooth power saving mechanisms (i.e., hold, sniff modes) ? dynamic transmit power control (tpc) ? channel quality driven (cqd) data rate networking coexistence ? supports marvell 2-wire bluetooth coexistence arbitration (2wbca) scheme ? supports marvell 3-wire bluetooth coexistence arbitration (3wbca) scheme ? supports marvell 4-wire bluetooth coexistence arbitration (4wbca) scheme
product overview host interfaces copyright ? 2009 marvell d oc. no. mv-s106650-00 rev. f n o vember 30, 2009, 2.00 p a ge 5 host interfaces ? g-spi device interface ? sdio device interface ? supports spi, 1-bit sdio, and 4-bit sdio transfer modes at the full clock range up to 50 mhz ? universal asynchronous receiver/transmitter (uart) interface peripheral bus interfaces ? clocked serial unit ? 3-wire, 4-wire (3w4w) serial interface ? 2-wire serial interface (twsi) ? 1-wire serial interface ? spi serial (eeprom) ? universal asynchronous receiver/transmitter (uart) ? general purpose input output (gpio) ? flexible gpio interface with light emitting diode (led) driver to indicate tx/rx activities audio interfaces audio codec interface ? marvell class d audio amplifier ? twsi interface for audio codec programming ? iec60958 compatible audio codec interface ? i 2 s (inter-ic sound) interface for audio data connection to analog-to-digital converters (adc) and digital-to-analog converters (dac) ? master and slave mode for i 2 s, msb, and lsb audio interfaces ? tri-state output capability pcm interface ? master or slave mode ? pcm bit width size of 8 bits or 16 bits ? up to 4 slots with configurable bit width and start positions ? short frame and long frame synchronization ? tri-state output capability
for further information about marvell? products, see the marvell website: http://www.marvell.com disclaimer no part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including phot ocopying and recording, for any purpose, without the express written permission of marvell. marvell retains the right to make changes to this document at any time, with out notice. marvell makes no warranty of any kind, expressed or implied, with regard to any information contained in this document, including, but not limited to, the impli ed warranties of merchantability or fitness for any particular purpose. further, marvell does not warrant the accuracy or completeness of the information, text, graphics, or other items contained within this document. marvell products are not designed for use in life-support equipment or applications that would cause a life-threatening situati on if any such products failed. do not use marvell products in these types of equipment or applications. with respect to the products described herein, the user or recipient, in the absence of appropriate u.s. government authorizati on, agrees: 1) not to re-export or release any such information consisting of technology, software or source code controlled for national s ecurity reasons by the u.s. export control regulations ("ear"), to a national of ear country groups d:1 or e:2; 2) not to export the direct product of such technology or such software, to ear country groups d:1 or e:2, if such technology o r software and direct products thereof are controlled for national security reasons by the ear; and, 3) in the case of technology controlled for national security reasons under the ear where the direct product of the technology is a complete plant or component of a plant, not to export to ear country groups d:1 or e:2 the direct product of the plant or major component thereof, if such direct product is controlled for national security reasons by the ear, or is subject to controls under the u.s. munitions list ("usml"). at all times hereunder, the recipient of any such information agrees that they shall be deemed to have manually signed this doc ument in connection with their receipt of any such information. copyright ? 1999?2009. marvell international ltd. all rights reserved. marvell, moving forward faster, the marvell logo, alaska , anyvoltage, dsp switcher, fastwriter, feroceon, libertas, link street, phyadvantage, prestera, topdog, virtual cable tester, yukon, and zj are registered trademarks of marvell or its affiliates. carrierspan, linkcrypt, powered by marvell green pfc, qdeo, quietvideo, sheeva, twind, and vct are trademarks of marvell or its affiliates. patent(s) pending?products identified in this document may be covered by one or more marvell patents and/or patent applications . 88W8688 product brief doc. no. mv-s106650-00 rev. f c opyright ? 2009 marvell p age 6 n ovember 30, 2009, 2.00


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